| CPC H03M 1/1245 (2013.01) [G11C 27/02 (2013.01); H03M 1/08 (2013.01); H03M 1/124 (2013.01)] | 15 Claims |

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1. An analog-to-digital converter, comprising:
a sample and hold circuit configured to sample an analog input voltage and hold the sampled voltage,
wherein the sample and hold circuit comprises:
an analog switch configured to generate a boosting voltage obtained by adding a constant voltage to the analog input voltage and output an analog output voltage corresponding to the analog input voltage by using the boosting voltage; and
a first capacitor in which the analog output voltage is charged,
wherein the analog switch comprises:
a bootstrap configured to generate the boosting voltage by adding the constant voltage to the analog input voltage according to a control signal, and output the boosting voltage; and
a switch comprising a first NMOS transistor and configured to be turned on and output the analog output voltage corresponding to the analog input voltage in response to the boosting voltage being input to a gate of the switch, and
wherein the bootstrap comprises:
a second capacitor in which the constant voltage is charged according to a clock signal for sampling; and
a transmission gate configured to transfer the analog input voltage to the second capacitor based on a voltage sampling signal, and
wherein the analog input voltage transferred from the transmission gate is added to the constant voltage charged in the second capacitor and the boosting voltage is output to an output terminal of the bootstrap.
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