|
1. An offset calibration circuit applied to a comparator array, comprising a global calibration voltage generation module, integrators, comparators, a global logic control circuit, and local logic control circuits, wherein an output terminal of the global logic control circuit is connected to a control terminal of the global calibration voltage generation module, and is configured to generate a control signal required by the global calibration voltage generation module; an output terminal of the global calibration voltage generation module is connected to input terminals of the integrators and is configured to generate a voltage required for calibrating the entire comparator array; one comparator is arranged for every two integrators, output terminals of the two integrators are connected to calibration terminals of one comparator, respectively, and the integrators are configured to integrate the voltage generated by the global calibration voltage generation module in a calibration phase, and to maintain the calibration voltage after integration in a normal working phase of the comparator; and input terminals of the local logic control circuits are connected to output terminals of the comparators, output terminals of the local logic control circuits are connected to control terminals of the integrators and are configured to generate control signals required by the integrators.
|
