US 12,294,371 B1
Clock generator with dual-path temperature compensation
Saleh Heidary Shalmany, Delft (NL); Kamran Souri, The Hague (NL); Sassan Tabatabaei, Sunnyvale, CA (US); and Uğur Sönmez, The Hague (NL)
Assigned to SiTime Corporation, Santa Clara, CA (US)
Filed by SiTime Corporation, Santa Clara, CA (US)
Filed on Jun. 17, 2024, as Appl. No. 18/745,082.
Application 17/544,171 is a division of application No. 17/199,314, filed on Mar. 11, 2021, granted, now 11,228,302, issued on Jan. 18, 2022.
Application 17/199,314 is a division of application No. 16/782,634, filed on Feb. 5, 2020, granted, now 10,979,031, issued on Apr. 13, 2021.
Application 16/782,634 is a division of application No. 16/004,283, filed on Jun. 8, 2018, granted, now 10,594,301, issued on Mar. 17, 2020.
Application 18/745,082 is a continuation of application No. 18/464,635, filed on Sep. 11, 2023, granted, now 12,047,071.
Application 18/464,635 is a continuation of application No. 17/973,851, filed on Oct. 26, 2022, granted, now 11,791,802, issued on Oct. 17, 2023.
Application 17/973,851 is a continuation of application No. 17/544,171, filed on Dec. 7, 2021, granted, now 11,528,014, issued on Dec. 13, 2022.
Claims priority of provisional application 62/517,396, filed on Jun. 9, 2017.
Int. Cl. H03K 3/011 (2006.01); G06F 1/04 (2006.01)
CPC H03K 3/011 (2013.01) [G06F 1/04 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
an integrated circuit die having circuitry to receive an oscillation signal;
wherein the oscillation signal has a frequency of oscillation that is characterized by a temperature dependent variation; and
wherein the circuitry is operable to:
receive a temperature signal representing a temperature,
generate a first timing signal having a reduced low-order component of the temperature-dependent variation, relative to the temperature dependent variation of the oscillation signal, and identify one or more digital correction factors representing a high-order component of the temperature dependent variation, and
output, to a device external to the integrated circuit die, the first timing signal and the one or more digital correction factors, the one or more digital correction factors being adapted for correction, by the device external to the integrated circuit die, of a timing signal so as to have, relative to the first timing signal, a reduced high-order component of the temperature-dependent variation.