US 12,294,366 B2
Level shifter with inside self-protection high bias generator
Yen-An Chang, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on May 18, 2023, as Appl. No. 18/319,835.
Prior Publication US 2024/0388293 A1, Nov. 21, 2024
Int. Cl. H03K 19/0185 (2006.01); H03K 3/356 (2006.01); H03K 19/003 (2006.01)
CPC H03K 19/018521 (2013.01) [H03K 3/356113 (2013.01); H03K 3/356182 (2013.01); H03K 19/00315 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a level shifting circuit configured to generate an output voltage in a second voltage domain corresponding to an input signal in a first voltage domain, wherein the level shifting circuit comprises at least a thick-oxide transistor and a thin-oxide transistor;
a bias generating circuit comprising a capacitor and a pair of cross-coupled NMOS transistors, wherein a first terminal of the capacitor is coupled to a node of the pair of cross-coupled NMOS transistors and a second terminal of the capacitor is coupled to a gate of the thin-oxide transistor, and wherein the bias generating circuit is operatively coupled to the level shifting circuit and configured to:
generate, at the first terminal of the capacitor, a bias voltage substantially higher than a voltage of the input signal; and
provide the bias voltage to a gate of the thick-oxide transistor, causing the level shifting circuit to generate the output voltage.