US 12,294,359 B2
System for controlling leakage current in integrated circuits
Sanjay Kumar Wadhwa, Noida (IN); Divya Tripathi, Noida (IN); Saurabh Goyal, Sonipat (IN); Alvin Leng Sun Loke, San Diego, CA (US); and Manish Kumar Upadhyay, New Delhi (IN)
Assigned to NXP B.V., Eindhoven (NL)
Filed by NXP B.V., Eindhoven (NL)
Filed on May 5, 2022, as Appl. No. 17/662,086.
Prior Publication US 2023/0361772 A1, Nov. 9, 2023
Int. Cl. H03K 17/687 (2006.01)
CPC H03K 17/6871 (2013.01) 20 Claims
OG exemplary drawing
 
1. An integrated circuit (IC), comprising:
an active transistor; and
a plurality of dummy transistors that is coupled in a series configuration,
wherein each dummy transistor of the plurality of dummy transistors is electrically inactive,
wherein a first dummy transistor of the plurality of dummy transistors comprises (i) a first conductive region that is coupled to the active transistor and (ii) a second conductive region,
wherein each remaining dummy transistor of the plurality of dummy transistors comprises a first conductive region and a second conductive region, and
wherein (i) the second conductive region of the first dummy transistor and (ii) the first conductive region and the second conductive region of each remaining dummy transistor of the plurality of dummy transistors are maintained in a floating state to control a leakage current between the active transistor and the plurality of dummy transistors.