US 12,294,306 B2
Controller of switching power supply having a frequency-jittering control circuit and control method thereof
Zhan Chen, Hangzhou (CN); Jian Deng, Hangzhou (CN); and Xiaoru Xu, Hangzhou (CN)
Assigned to Silergy Semiconductor Technology (Hangzhou) LTD, Hangzhou (CN)
Filed by Silergy Semiconductor Technology (Hangzhou) LTD, Hangzhou (CN)
Filed on Jan. 27, 2022, as Appl. No. 17/585,709.
Claims priority of application No. 202110159783.8 (CN), filed on Feb. 5, 2021.
Prior Publication US 2022/0255438 A1, Aug. 11, 2022
Int. Cl. H02M 3/335 (2006.01); H02M 1/00 (2007.01); H02M 1/44 (2007.01)
CPC H02M 3/33507 (2013.01) [H02M 1/0025 (2021.05); H02M 1/44 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A controller of a switching power supply, the controller comprising:
a) a frequency-jittering control circuit configured to generate a frequency-jittering signal adaptively based on a switching period of a power transistor in the switching power supply, and a first period that is a sum of a conduction time of the power transistor and a demagnetization time of an inductor, wherein the switching period comprises the first period and a second period;
b) a comparator having two input terminals for respectively receiving an inductor current sampling signal and a feedback control signal, and being configured to compare the signals of the two input terminals to generate a switching control signal, in order to control the power transistor;
c) a superimposing circuit configured to superimpose the frequency-jittering signal on one of the two input terminals of the comparator, wherein a switching frequency of the switching power supply varies within a preset range under different load conditions;
d) wherein the frequency-jittering control circuit comprises an error amplifier having a non-inverting input terminal for receiving the feedback control signal, and an inverting input terminal for receiving an inverting input signal proportional to an Intermediate signal, and being configured to generate the intermediate signal representative of an amplitude of the frequency-littering signal; and
e) wherein the frequency-jittering control circuit comprises an inverting input signal generating circuit configured to multiply the intermediate signal with a proportional coefficient to generate the inverting input signal, wherein the proportional coefficient is a ratio of the switching period of the power transistor to the sum of the conduction time of the power transistor and the demagnetization time of the inductor.