US 12,294,018 B2
Vertical power semiconductor device including silicon carbide (sic) semiconductor body
Thomas Aichinger, Faak am See (AT); Dethard Peters, Höchstadt (DE); Michael Hell, Erlangen (DE); and Andreas Hürner, Heroldsberg (DE)
Assigned to Infineon Technologies AG, Neubiberg (DE)
Filed by Infineon Technologies AG, Neubiberg (DE)
Filed on Sep. 6, 2024, as Appl. No. 18/827,272.
Claims priority of application No. 102023124154.0 (DE), filed on Sep. 7, 2023.
Prior Publication US 2025/0089323 A1, Mar. 13, 2025
Int. Cl. H01L 29/16 (2006.01); H01L 29/43 (2006.01); H01L 29/51 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/1608 (2013.01) [H01L 29/435 (2013.01); H01L 29/518 (2013.01); H01L 29/7813 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A vertical power semiconductor device, comprising:
a silicon carbide (SiC) semiconductor body having a first surface and a second surface opposite to the first surface, the SiC semiconductor body including a transistor cell area comprising gate structures, a gate pad area, and an interconnection area electrically coupling a gate electrode of the gate structures and a gate pad of the gate pad area via a gate interconnection;
a source or emitter electrode; and
a first interlayer dielectric comprising a first interface to the source or emitter electrode and a second interface to at least one of the gate electrode, the gate interconnection, or the gate pad, wherein a value of a conduction band offset at the first interface ranges from 1.0 eV to 2.5 eV.