US 12,294,007 B2
Array substrate and display panel
Yiyu Guo, Hubei (CN)
Assigned to Wuhan China Star Optoelectronics Technology Co., Ltd., Wuhan (CN)
Appl. No. 17/623,674
Filed by Wuhan China Star Optoelectronics Technology Co., Ltd., Hubei (CN)
PCT Filed Dec. 20, 2021, PCT No. PCT/CN2021/139690
§ 371(c)(1), (2) Date Dec. 29, 2021,
PCT Pub. No. WO2023/108678, PCT Pub. Date Jun. 22, 2023.
Claims priority of application No. 202111539804.5 (CN), filed on Dec. 15, 2021.
Prior Publication US 2024/0371885 A1, Nov. 7, 2024
Int. Cl. H01L 27/12 (2006.01)
CPC H01L 27/1222 (2013.01) [H01L 27/124 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An array substrate, comprising:
a substrate; and
a plurality of transistors disposed on the substrate, wherein each transistor comprises:
an active portion disposed on the substrate, wherein the active portion comprises a semiconductor portion and at least one epitaxial sharp corner portion connected to the semiconductor portion and protruding from the semiconductor portion in a first direction, and in the first direction, the epitaxial sharp corner portion is located on a side of the semiconductor portion;
an insulating portion disposed on the active portion and covering the active portion; and
a first gate disposed on the insulating portion, wherein the first gate is located on the semiconductor portion and the epitaxial sharp corner portion, and the first gate extends along the first direction;
the array substrate further comprising a second gate, wherein the second gate and the first gate are disposed at intervals on the insulating portion, the second gate is located on the semiconductor portion and the epitaxial sharp corner portion, and the second gate extends along the first direction, and wherein the first gate and the second gate are connected in series, independent of each other, or connected in parallel.