US 12,293,982 B2
Semiconductor structure having hybrid bonding pad
Yi-Jen Lo, New Taipei (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Jun. 14, 2022, as Appl. No. 17/839,806.
Prior Publication US 2023/0402414 A1, Dec. 14, 2023
Int. Cl. H01L 23/00 (2006.01)
CPC H01L 24/08 (2013.01) [H01L 24/06 (2013.01); H01L 24/80 (2013.01); H01L 2224/06517 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a first semiconductor substrate;
a first conductive pad over the first semiconductor substrate;
a first hybrid bonding pad on the first conductive pad, wherein the first hybrid bonding pad comprises nano-twins copper, and a thickness of the first hybrid bonding pad is less than a thickness of the first conductive pad;
a first dielectric layer over the first semiconductor substrate, wherein the first dielectric layer has a first trench for the first conductive pad disposed therein, wherein the first dielectric layer is made of dielectric material, wherein the first trench is a through trench extended through the first dielectric layer; and
a second dielectric layer disposed on a top surface of the first dielectric layer, wherein the second dielectric layer has a second trench for the first hybrid bonding pad disposed therein and a third trench to expose a portion of the top surface of the first dielectric layer, wherein each of the second trench and the third trench is also a through trench extended through the second dielectric layer;
wherein a depth of the second trench is less than a depth of the first trench;
wherein a width of the second trench is greater than a width of the first trench.