US 12,293,967 B2
Three-dimensional semiconductor device
Sung Lae Oh, Icheon-si (KR); Sang Woo Park, Icheon-si (KR); and Dong Hyuk Chae, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Nov. 9, 2023, as Appl. No. 18/505,998.
Application 18/505,998 is a continuation of application No. 17/467,678, filed on Sep. 7, 2021, granted, now 11,848,266.
Claims priority of application No. 10-2021-0044510 (KR), filed on Apr. 6, 2021.
Prior Publication US 2024/0071910 A1, Feb. 29, 2024
Int. Cl. H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H10B 69/00 (2023.01)
CPC H01L 23/5226 (2013.01) [H01L 21/76816 (2013.01); H01L 23/5283 (2013.01); H10B 69/00 (2023.02)] 19 Claims
OG exemplary drawing
 
1. A three-dimensional semiconductor device comprising:
a first cell region;
a second cell region;
a via plug region between the first cell region and the second cell region, wherein the via plug region includes a first site, a second site, a third site, and a fourth site arranged in a zigzag pattern in a row direction;
a first via plug disposed in the first site, the first via plug having a first diameter;
a second via plug disposed in the second site, the second via plug having a second diameter;
a third via plug disposed in the third site, the third via plug having a third diameter; and
a fourth via plug disposed in the fourth site, the fourth via plug having a fourth diameter;
wherein:
the second diameter is greater than the first diameter,
the third diameter is greater than the second diameter, and
the fourth diameter is greater than the third diameter.