US 12,293,964 B2
Package substrate and semiconductor structure with package substrate
Hailin Wang, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Jan. 21, 2022, as Appl. No. 17/580,760.
Application 17/580,760 is a continuation of application No. PCT/CN2021/109312, filed on Jul. 29, 2021.
Claims priority of application No. 202110464416.7 (CN), filed on Feb. 5, 2021.
Prior Publication US 2022/0254709 A1, Aug. 11, 2022
Int. Cl. H01L 23/498 (2006.01); H01L 23/367 (2006.01)
CPC H01L 23/49838 (2013.01) [H01L 23/367 (2013.01); H01L 23/49811 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A package substrate, comprising:
a body, wherein the body comprises an opening region;
a conductive layer, wherein the conductive layer is disposed at the opening region, the conductive layer comprises a first conductive bridge and a second conductive bridge, and the first conductive bridge and the second conductive bridge are disposed at intervals, and
conductive bumps, wherein the conductive bumps are disposed on the body and located outside the opening region; and,
wherein the conductive bumps are disposed above and below the opening region, and wall surfaces of the opening region are located between the conductive bumps;
wherein the first conductive bridge is provided with at least one first via.