| CPC H01L 21/32 (2013.01) [H01L 21/31053 (2013.01); H01L 21/47 (2013.01)] | 20 Claims |

|
1. A method of fabricating a semiconductor device, comprising:
forming a hard mask layer on a target layer;
forming, on the hard mask layer, a plurality of mandrel lines each having sidewalls extending in a first direction and arranged in a second direction intersecting the first direction such that the plurality of mandrel lines define a non-mandrel area;
forming a cut-off region in at least one of the plurality of mandrel lines;
forming a spacer material layer such that the spacer material layer is conformally formed on the plurality of mandrel lines and the non-mandrel area and the spacer material layer includes a cut spacer in the cut-off region;
depositing a gap-fill material such that the gap-fill material is formed on the cut spacer and the gap-fill material includes a cut block on a portion of the non-mandrel area;
etching back the spacer material layer such that sidewall spacers are formed on the sidewalls of the plurality of mandrel lines and a region, except for the cut block, of upper surfaces of the plurality of mandrel lines and the non-mandrel area is exposed;
selectively removing the plurality of mandrel lines from the sidewall spacers;
using the cut spacer, the cut block, and the sidewall spacers to form a mask pattern by etching the hard mask layer; and
etching the target layer using the mask pattern.
|