CPC G09G 3/3266 (2013.01) [G09G 3/32 (2013.01); G09G 2300/0819 (2013.01); G09G 2310/0289 (2013.01); G09G 2310/0297 (2013.01); G09G 2310/08 (2013.01); G09G 2320/045 (2013.01)] | 20 Claims |
1. A gate driving circuit, comprising:
a pull-up module electrically connected to a first node, wherein the pull-up module is configured to connect a clock signal line and a signal output terminal of the gate driving circuit, or to disconnect an electrical connection between the clock signal line and the signal output terminal according to an electric potential of the first node;
an isolation module electrically connected to the first node and a second node, wherein the isolation module is configured to block a coupling effect of an electric potential variation of the first node on an electric potential of the second node;
a pull-down maintaining module electrically connected to the first node and a first power terminal; and
an inverting module electrically connected to the second node, wherein the inverting module is configured to control the pull-down maintaining module to connect the first power terminal and the first node, or disconnect an electrical connection between the first power terminal and the first node according to the electric potential of the second node.
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