| CPC G09G 3/3233 (2013.01) [G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/045 (2013.01)] | 14 Claims |
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1. A pixel circuit comprising:
a driving transistor, wherein a drain of the driving transistor is electrically connected to a positive power supply line;
a storage capacitor, wherein one terminal of the storage capacitor is electrically connected to a first gate of the driving transistor, and the other terminal of the storage capacitor is electrically connected to a source of the driving transistor;
a first transistor, wherein a first electrode of the first transistor is electrically connected to the one terminal of the storage capacitor, a first gate of the first transistor is electrically connected to a second gate of the first transistor and a scan line, a source of the first transistor is electrically connected to a data line, and the first transistor is a dual-channel type thin film transistor;
a second transistor, wherein a first electrode of the second transistor is electrically connected to a source of the driving transistor, a first gate of the second transistor is electrically connected to an initial control line, and a second electrode of the second transistor is electrically connected to an initial voltage line; and
a light emitting device, wherein an anode of the light emitting device is electrically connected to the source of the driving transistor, and a cathode of the light emitting device is electrically connected to a negative power supply line;
a third transistor, wherein a first electrode of the third transistor is electrically connected to the positive power supply line, a first gate of the third transistor is electrically connected to a second gate of the third transistor and a light emitting control line, a second electrode of the third transistor is electrically connected to the drain of the driving transistor, and the third transistor is the dual-channel type thin film transistor; and
a first capacitor, wherein one terminal of the first capacitor is electrically connected to the source of the driving transistor, and the other terminal of the first capacitor is electrically connected to the first electrode of the third transistor,
wherein a second gate of the second transistor is electrically connected to the first gate of the second transistor, and the second transistor is the dual-channel type thin film transistor, and
wherein a second gate of the driving transistor is electrically connected to the first gate of the driving transistor, and the driving transistor is the dual-channel type thin film transistor.
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