| CPC G09G 3/32 (2013.01) [G09G 2310/0278 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2330/021 (2013.01)] | 15 Claims |
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1. A pixel compensation circuit, comprising a data writing transistor, a driving transistor, a reset transistor, a first switching transistor, a second switching transistor, a first capacitor, a second capacitor, and a light-emitting device;
wherein a gate of the data writing transistor is electrically connected to a current stage scanning signal line, a source of the data writing transistor is electrically connected to a first node, and a drain of the data writing transistor is electrically connected to a data line; the current stage scanning signal line is configured to provide a scanning signal, and the data line is configured to provide a data signal;
wherein a gate of the driving transistor is electrically connected to the first node, a source of the driving transistor is electrically connected to a drain of the first switching transistor, a drain of the driving transistor is electrically connected to a positive electrode of the light-emitting device, and a negative electrode of the light-emitting device is electrically connected to a negative power supply;
wherein the reset transistor is configured to reset a potential of the first node to be a second voltage provided by the second voltage terminal during a reset stage; wherein a gate of the reset transistor is electrically connected to a compensation control line, a source of the reset transistor is electrically connected to the first node, and a drain of the reset transistor is electrically connected to the second voltage terminal;
wherein a gate of the first switching transistor is electrically connected to a control signal line, a source of the first switching transistor is electrically connected to a positive power supply, and a drain of the first switching transistor is electrically connected to the source of the driving transistor;
wherein a gate of the second switching transistor is electrically connected to a reset signal line, a source of the second switching transistor is electrically connected to a first voltage terminal, a drain of the second switching transistor is electrically connected to a connection point between the drain of the driving transistor and the positive electrode of the light-emitting device, a second node is formed at the connection point;
wherein one terminal of the first capacitor is electrically connected to the positive power supply, and another terminal of the first capacitor is electrically connected to the second node; and
wherein one terminal of the second capacitor is electrically connected to the first node, and another terminal of the second capacitor is electrically connected to the second node.
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