| CPC G09G 3/32 (2013.01) [G09G 3/20 (2013.01); G09G 3/3266 (2013.01); G09G 3/3216 (2013.01); G09G 3/3225 (2013.01); G09G 2300/0408 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/02 (2013.01); G09G 2310/0202 (2013.01); G09G 2310/0205 (2013.01); G09G 2310/0218 (2013.01); G09G 2310/0264 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0286 (2013.01)] | 17 Claims |
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1. A driving substrate, configured to drive a light-emitting unit to emit light, comprising:
a base, comprising a display region;
a plurality of rows of scan lines and a plurality of data lines, arranged on the base; wherein a plurality of pixel regions are defined by the plurality of rows of scan lines and the plurality of data lines crossing each other substantially longitudinally and horizontally, the plurality of pixel regions are located in the display region, and row directions of the plurality of pixel regions are substantially parallel to the scan lines; and
a scan driving circuit, arranged in the display region of the base and comprising a plurality of scan driving units which are cascaded;
wherein a same scan driving unit is arranged in pixel regions in at least two rows among the plurality of pixel regions and capable of outputting at least one row of gate scanning signal;
wherein the scan driving unit comprises a charging unit, a resetting unit, and an outputting unit connected to a clock signal line;
the outputting unit is located in the pixel regions in one or two rows, and the charging unit and the resetting unit are located in the pixel regions in another row different from the rows in which the pixel regions having the outputting unit is located; or
the outputting unit is located in pixel regions in a first row, the charging unit is located in pixel regions in a second row, the resetting unit is located in pixel regions in a third row, and the first row, the second row, and the third row are different from each other;
the scan driving unit comprises a plurality of thin film transistors, and the plurality of thin film transistors are distributed in the pixel regions in two or three rows;
the scan driving unit comprises a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, and a capacitor;
a source of the first thin film transistor is connected to a gate of the first thin film transistor and an output terminal of the gate scanning signal at a previous stage, and a drain of the first thin film transistor is connected to a source of the fourth thin film transistor and a gate of the second thin film transistor;
a source of the second thin film transistor is provided with a clock signal, and a drain of the second thin film transistor is connected to at least one row of the scan lines to output at least one row of the gate scanning signal;
a gate of the third thin film transistor and a gate of the fourth thin film transistor are connected to a first scan line, and a source of the third thin film transistor and the drain of the second thin film transistor are connected to a second scan line; a drain of the third thin film transistor and a drain of the fourth thin film transistor is provided with a low-level signal;
the capacitor is connected to the gate of the second thin film transistor and the drain of the second thin film transistor;
wherein the gate of the first thin film transistor is connected to a third scan line, and the first scan line, the second scan line, and the third scan line are different from each other.
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