| CPC G06N 5/04 (2013.01) [G06N 5/01 (2023.01); G06N 20/20 (2019.01); H04L 41/12 (2013.01); H04L 41/142 (2013.01); H04L 41/149 (2022.05); H04L 43/08 (2013.01); H04W 24/08 (2013.01); H04W 84/12 (2013.01)] | 19 Claims |

|
1. A system comprising:
hardware processing circuitry;
one or more memories storing instructions that when executed cause the hardware processing circuitry to:
obtain a plurality of datasets, each dataset of the plurality of datasets comprising one or more operational parameters that each include a feature parameter and a target parameter;
classify each dataset of the plurality of datasets based on a corresponding target parameter of a corresponding dataset;
generate, based on the classification of each dataset of the plurality of datasets, a rule set including one or more sub-rules;
determine, based on identifying one or more datasets of the plurality of datasets that satisfy at least one of the one or more sub-rules, one or more feature parameters of the one or more datasets that satisfy the one or more sub-rules; and
perform a remedial action determined from the one or more feature parameters of the one or more datasets that satisfy at least one of the one or more sub-rules.
|