| CPC G06N 3/063 (2013.01) [G06F 30/392 (2020.01); G06N 3/04 (2013.01); G06N 3/08 (2013.01); G06F 2119/02 (2020.01)] | 20 Claims |
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1. A method for performing mask synthesis for a circuit design based on machine learning, the method comprising:
receiving, by a processing device, the circuit design representing a physical layout of a circuit, the circuit design comprising a plurality of circuit design polygons;
training a machine learning based model using labeled training dataset generated from previously generated mask designs for circuit designs, the machine learning based model trained to predict an offset distance from a circuit design polygon of an input circuit design for generating a mask design;
for a circuit design polygon selected from the plurality of circuit design polygons:
selecting a location associated with the circuit design polygon;
determining a set of features comprising feature values representing a neighborhood of the location, the neighborhood comprising a plurality of points within a threshold distance of the location, the set of feature values ordered by traversing the plurality of points using an ordering scheme used during training of the machine learning model;
providing the set of features as input to the machine learning based model;
executing the machine learning based model to determine an offset distance from an edge of the circuit design polygon; and
generating a mask design polygon corresponding to the circuit design polygon based on the offset distance; and
generating, by the processing device, a mask design for the circuit design using the generated mask design polygons.
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