US 12,293,230 B2
Hardware acceleration for function processing
Prateek Tandon, Issaquah, WA (US); and Brian Jacob Corell, Sammamish, WA (US)
Assigned to Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed by Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed on Jan. 4, 2024, as Appl. No. 18/404,705.
Application 17/586,434 is a division of application No. 16/555,927, filed on Aug. 29, 2019, granted, now 11,237,873, issued on Feb. 1, 2022.
Application 18/404,705 is a continuation of application No. 17/586,434, filed on Jan. 27, 2022.
Prior Publication US 2024/0134697 A1, Apr. 25, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 9/46 (2006.01); G06F 9/38 (2018.01); G06F 9/48 (2006.01); G06F 9/50 (2006.01); G06F 13/362 (2006.01)
CPC G06F 9/5027 (2013.01) [G06F 9/3836 (2013.01); G06F 9/4843 (2013.01); G06F 13/3625 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A computer-implemented method, comprising:
determining that a hardware acceleration condition has been satisfied for a first function by:
counting, within a time interval, a number of requests to perform the first function that a function processing service receives; and
determining that the number of requests to perform the first function exceeds a hardware acceleration condition threshold value;
based on the hardware acceleration condition threshold value being exceeded, configuring a hardware circuit to perform the first function; and
causing the first function to be performed via the hardware circuit.