US 12,293,184 B1
Illegal address mask method and device for cores of DSP
Haibin Zhou, Nanjing (CN); Guoqiang He, Nanjing (CN); Wenjun Han, Nanjing (CN); and Ming Hao, Nanjing (CN)
Assigned to Jiangsu Huachuang Microsystem Company Limited, Nanjing (CN)
Filed by Jiangsu Huachuang Microsystem Company Limited, Nanjing (CN)
Filed on Dec. 27, 2024, as Appl. No. 19/002,787.
Claims priority of application No. 202311821091.0 (CN), filed on Dec. 27, 2023.
Int. Cl. G06F 9/30 (2018.01); G06F 9/32 (2018.01)
CPC G06F 9/30038 (2023.08) [G06F 9/30145 (2013.01); G06F 9/324 (2013.01)] 9 Claims
OG exemplary drawing
 
1. An illegal address mask method for cores of a digital signal processor (DSP), comprising the following steps:
S1, initializing a core of the DSP, comprising: powering on and resetting the core of the DSP;
S2, configuring, in the core of the DSP, a group of illegal address mask registers, comprising a start address register and an end address register, and taking an address range defined by the start address register and the end address register as a masked address range; configuring, in the core of the DSP, a first comparator and a second comparator to send out illegal address decision signals for instructions within the masked address range; configuring, in the core of the DSP, a first gate and a second gate to block or transmit the instructions;
S3, acquiring a program counter (PC) pointer by a PC or a jump instruction, and determining, by the first comparator in S2, whether an address of the PC pointer is located in the masked address range; when the address of the PC pointer is located in the masked address range, sending out a first illegal address decision signal by the first comparator to control the first gate to block the PC pointer so as to stop an operation of the PC pointer, such that a first illegal address is masked; when the address of the PC pointer is not located in the masked address range, controlling the first gate to transmit the PC pointer to perform pre-decoding, wherein the pre-decoding comprises: fetching the instructions from a program memory by the PC pointer to obtain fetched instructions, and transmitting the fetched instructions to an instruction pre-decoder for pre-decoding to obtain an address of a memory access instruction; and
S4, determining, by the second comparator in S2, whether the address of the memory access instruction obtained in S3 is located in the masked address range; when the address of the memory access instruction obtained in S3 is located in the masked address range, sending out a second illegal address decision signal by the second comparator to control the second gate to block the memory access instruction so as to stop an operation of the memory access instruction, such that a second illegal address is masked; when the address of the memory access instruction obtained in S3 is not located in the masked address range, controlling the second gate to transmit the memory access instruction to perform decoding, and completing a memory access operation according to an instruction obtained by decoding.