CPC G06F 3/064 (2013.01) [G01K 3/04 (2013.01); G06F 1/3228 (2013.01); G06F 1/324 (2013.01); G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] | 20 Claims |
1. A system comprising:
a memory device; and
a processing device, operatively coupled to the memory device, the processing device configured to perform operations, comprising:
initializing a block family associated with the memory device;
initializing a timer at initialization of the block family;
associating pages of the memory device, as the pages are programmed, with the block family while the block family is open;
storing, in non-volatile memory of the memory device, a value of the timer before powering down the system while the block family is open;
detecting a power on of the system;
measuring a data state metric associated with memory cells of the pages, wherein the data state metric reflects one of a lower tail location or an upper tail location of a voltage distribution;
estimating a time after program value of the pages based on comparing a level of the data state metric to a temporal voltage shift function;
incrementing the value of the timer, restored from the non-volatile memory, based on the time after program value; and
closing the block family based on the incremented value of the timer.
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