US 12,292,975 B2
Method, system and apparatus to prevent denial of service attacks on PCIe based computing devices
Sriram Ranganathan, Bangalore (IN); Pannerkumar Rajagopal, Bangalore (IN); Saravanakumar Ulaganathan, Bangalore (IN); Siddhartha Selvaraj, Coimbatore (IN); and Radhakrishna Pai, Bangalore (IN)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Mar. 28, 2022, as Appl. No. 17/705,747.
Prior Publication US 2022/0215099 A1, Jul. 7, 2022
Int. Cl. G06F 21/57 (2013.01); G06F 15/78 (2006.01); G06F 21/00 (2013.01)
CPC G06F 21/57 (2013.01) [G06F 15/7807 (2013.01); G06F 21/00 (2013.01)] 24 Claims
OG exemplary drawing
 
1. A non-transitory computer-readable medium comprising a processor circuitry and a memory circuitry in communication with the processor circuitry and including instructions to authenticate an instruction to transition power state of a core Intellectual Property (IP) device, the memory circuitry further comprising instructions to cause the processor circuitry to:
initiate power down for the core IP device when the core IP device is idle;
notify a filter driver of the power down initiation;
generate a software management interrupt (SMI) message for the IP device, the SMI message configured to enable or unlock a Unlock_lock_Enable (ULE) register corresponding to the IP device in order to receive and implement a subsequent power down request;
program the ULE register to allow power down during a predefined timeout period by changing a register bit of the ULE register, the ULE register corresponding to the IP device;
receive the subsequent power down request and determine that the power down action is enabled and/or unlocked at the ULE register; and
implement the subsequent power down request when the ULE register is enabled and/or unlocked.