US 12,292,849 B2
PCIe device
Yong Tae Jeon, Icheon (KR); Byung Cheol Kang, Icheon (KR); Seung Duk Cho, Icheon (KR); Sang Hyun Yoon, Icheon (KR); Se Hyeon Han, Icheon (KR); and Jae Young Jang, Icheon (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Jan. 8, 2024, as Appl. No. 18/406,919.
Application 18/406,919 is a continuation of application No. 17/506,610, filed on Oct. 20, 2021, granted, now 11,928,070.
Claims priority of application No. 10-2021-0048063 (KR), filed on Apr. 13, 2021; application No. 10-2021-0048073 (KR), filed on Apr. 13, 2021; and application No. 10-2021-0048077 (KR), filed on Apr. 13, 2021.
Prior Publication US 2024/0168911 A1, May 23, 2024
Int. Cl. G06F 13/42 (2006.01); G06F 1/08 (2006.01); G06F 7/58 (2006.01); G06F 13/40 (2006.01)
CPC G06F 13/4221 (2013.01) [G06F 1/08 (2013.01); G06F 7/588 (2013.01); G06F 13/4045 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method for operating a Peripheral Component Interconnect Express (PCIe) device including a plurality of common functions performing operations associated with a PCIe interface, the method comprising:
receiving function type setting information from a host;
changing function types of at least one of the plurality of common functions based on the function type setting information as one of a plurality of function types including a physical function (PF) type, a virtual function (VF) type, and a disable function type in which the operations are disabled;
controlling the plurality of common functions according to the function types to perform the operations, and
providing the host with PCIe device completion information according to an operation mode of a common function among the plurality of common functions.