US 12,292,847 B2
Multiprocessor system and method for configuring multiprocessor system
Huixiong Zhu, Shenzhen (CN)
Assigned to HUAWEI TECHNOLOGIES CO., LTD., Shenzhen (CN)
Filed by Huawei Technologies Co., Ltd., Shenzhen (CN)
Filed on Jan. 9, 2023, as Appl. No. 18/151,705.
Application 18/151,705 is a continuation of application No. PCT/CN2021/102235, filed on Jun. 25, 2021.
Claims priority of application No. 202010660272.X (CN), filed on Jul. 10, 2020; and application No. 202010899009.6 (CN), filed on Aug. 31, 2020.
Prior Publication US 2023/0161726 A1, May 25, 2023
Int. Cl. G06F 13/20 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01)
CPC G06F 13/4022 (2013.01) [G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A multiprocessor system comprising:
a first Peripheral Component Interconnect Express (PCIe) domain, wherein the first PCIe domain comprises:
a first processor configured to perform enumeration;
a first PCIe switch connected to the first processor, wherein the first PCIe switch further comprises a first fabric port that is configured to reject a scanning instruction of the first processor when the first processor performs the enumeration; and
a first PCIe device connected to the first PCIe switch;
a bus; and
a second PCIe domain, wherein the second PCIe domain comprises:
a second processor;
a second PCIe switch connected to the second processor and configured to communicate with the first PCIe switch using the bus; and
a second PCIe device connected to the second PCIe switch, wherein the first processor or the first PCIe device is configured to access the second PCIe device using the bus when the first processor performs the enumeration.