US 12,292,842 B2
Network layer 7 offload to infrastructure processing unit for service mesh
Mrittika Ganguli, Tempe, AZ (US); Anjali Jain, Portland, OR (US); Reshma Lal, Portland, OR (US); Edwin Verplanke, Chandler, AZ (US); Priya Autee, Chandler, AZ (US); Chih-Jen Chang, Union City, CA (US); Abhirupa Layek, Chandler, AZ (US); and Nupur Jain, Saratoga, CA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 27, 2021, as Appl. No. 17/486,579.
Prior Publication US 2022/0014459 A1, Jan. 13, 2022
Int. Cl. G06F 13/38 (2006.01); G06F 13/16 (2006.01); G06F 13/28 (2006.01); H04L 45/02 (2022.01); H04L 45/64 (2022.01); H04L 67/289 (2022.01); H04L 69/321 (2022.01)
CPC G06F 13/1668 (2013.01) [G06F 13/1631 (2013.01); G06F 13/28 (2013.01); H04L 45/02 (2013.01); H04L 45/64 (2013.01); H04L 67/289 (2013.01); H04L 69/321 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
an infrastructure processing unit (IPU) comprising:
an IPU memory to store a routing table for a service mesh, the routing table to map shared memory address spaces of the IPU and a host device executing one or more microservices, wherein the service mesh provides an infrastructure layer for the one or more microservices executing on the host device; and
one or more IPU cores communicably coupled to the IPU memory, the one or more IPU cores to:
host a network layer 7 (L7) proxy endpoint for the service mesh; and
communicate messages between the network L7 proxy endpoint and an L7 interface device of the one or more microservices by copying data between the shared memory address spaces of the IPU and the host device based on the routing table.