US 12,292,838 B2
Host device performing near data processing function and accelerator system including the same
Hyungkyu Ham, Pohang (KR); Hyunuk Cho, Incheon (KR); Hyojin Sung, Pohang (KR); Eunhyeok Park, Pohang (KR); and Gwangsun Kim, Pohang (KR)
Assigned to SK Hynix Inc., Icheon (KR); and POSTECH ACADEMY-INDUSTRY FOUNDATION, Pohang (KR)
Filed by SK Hynix Inc., Icheon (KR); and POSTECH ACADEMY—INDUSTRY FOUNDATION, Pohang (KR)
Filed on Dec. 14, 2022, as Appl. No. 18/066,161.
Claims priority of application No. 10-2021-0184439 (KR), filed on Dec. 22, 2021; and application No. 10-2022-0137080 (KR), filed on Oct. 24, 2022.
Prior Publication US 2023/0195651 A1, Jun. 22, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/1081 (2016.01); G06F 12/123 (2016.01)
CPC G06F 12/1081 (2013.01) [G06F 12/125 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A host device comprising:
a unit processor configured to generate a near data processing (NDP) request;
a host expansion control circuit configured to receive the NDP request; and
a local memory device configured to store data corresponding to the NDP request according to control by the host expansion control circuit,
wherein in response to the NDP request, the host expansion control circuit performs:
a request processing operation to perform a memory operation corresponding to the NDP request on the local memory device, the memory operation including a read operation or a write operation, and
a computation operation using the data corresponding to the NDP request,
wherein the host expansion control circuit comprises:
one or more host NDP request control circuits; and
an interface circuit configured to receive the NDP request, select a host NDP request control circuit from among the one or more host NDP request control circuits according to an address of the NDP request, and provide the NDP request to the selected host NDP control circuit,
wherein the selected host NDP request control circuit is configured to control the request processing operation and the computation operation corresponding to the NDP request,
wherein the selected host NDP request control circuit comprises:
a filter circuit configured to identify the NDP request;
an NDP circuit configured to produce a request for the request processing operation and to perform the computation operation according to the NDP request identified at the filter circuit; and
a memory controller configured to control the local memory device according to the request for the request processing operation produced by the NDP circuit,
wherein the host NDP request control circuit further includes a cache memory connected between the filter circuit and the memory controller,
wherein the host expansion control circuit is further configured to receive a normal request that does not require a computation operation, and
wherein the filter circuit is further configured to identify the normal request and to bypass the identified normal request to the memory controller via the cache memory.