US 12,292,826 B2
Method for managing a memory apparatus
Tsai-Cheng Lin, Hsinchu (TW); and Chun-Kun Lee, Hsinchu County (TW)
Assigned to Silicon Motion, Inc., Hsinchu County (TW)
Filed by Silicon Motion, Inc., Hsinchu County (TW)
Filed on May 14, 2024, as Appl. No. 18/663,114.
Application 18/663,114 is a continuation of application No. 18/218,122, filed on Jul. 5, 2023, granted, now 12,019,540.
Application 18/218,122 is a continuation of application No. 17/975,565, filed on Oct. 27, 2022, granted, now 11,748,258, issued on Sep. 5, 2023.
Application 17/975,565 is a continuation of application No. 17/351,168, filed on Jun. 17, 2021, granted, now 11,520,697, issued on Dec. 6, 2022.
Application 17/351,168 is a continuation of application No. 16/888,836, filed on May 31, 2020, granted, now 11,074,176, issued on Jul. 27, 2021.
Application 16/888,836 is a continuation of application No. 16/596,703, filed on Oct. 8, 2019, granted, now 10,795,811, issued on Oct. 6, 2020.
Application 16/596,703 is a continuation of application No. 15/642,295, filed on Jul. 5, 2017, granted, now 10,482,011, issued on Nov. 19, 2019.
Application 15/642,295 is a continuation of application No. 14/566,724, filed on Dec. 11, 2014, abandoned.
Application 14/566,724 is a continuation of application No. 13/604,644, filed on Sep. 6, 2012, granted, now 9,037,832, issued on May 19, 2015.
Application 13/604,644 is a continuation of application No. 12/471,462, filed on May 25, 2009, granted, now 8,285,970, issued on Oct. 9, 2012.
Claims priority of provisional application 61/140,850, filed on Dec. 24, 2008.
Claims priority of provisional application 61/112,173, filed on Nov. 6, 2008.
Prior Publication US 2024/0296120 A1, Sep. 5, 2024
Int. Cl. G06F 12/02 (2006.01); G06F 12/1009 (2016.01)
CPC G06F 12/0246 (2013.01) [G06F 12/1009 (2013.01); G06F 2212/7207 (2013.01); G06F 2212/7208 (2013.01); G06F 2212/7209 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A method for managing a memory apparatus, the memory apparatus comprising a volatile memory and at least one non-volatile (NV) memory element comprising a plurality of physical blocks, the method comprising:
obtaining a first host address and first data from a received first access command;
obtaining a second host address and second data from a received second access command;
linking the first host address to at least a first page of a physical block of the plurality of physical blocks and linking the second host address to at least a second page of the physical block;
storing the first data and second data into the physical block;
building a valid page position table indicating positions of valid pages within the physical block, and storing the valid page position table in the volatile memory; and
building a global page address linking table according to the linking relationships between the pages of the physical block and the host addresses and storing the global page address linking table in the volatile memory;
wherein the valid page position table and the global page address linking table are loaded from the volatile memory and stored to the NV memory element at predetermined time periods.