US 12,292,804 B2
On-die channel impedance verification
Sandor Farkas, Round Rock, TX (US); and Bhyrav Mutnury, Austin, TX (US)
Assigned to Dell Products L.P., Round Rock, TX (US)
Filed by DELL PRODUCTS L.P., Round Rock, TX (US)
Filed on May 17, 2023, as Appl. No. 18/319,274.
Prior Publication US 2024/0385231 A1, Nov. 21, 2024
Int. Cl. G06F 11/00 (2006.01); G01R 27/16 (2006.01); G06F 11/07 (2006.01); G06F 11/16 (2006.01); G06F 11/27 (2006.01)
CPC G06F 11/1616 (2013.01) [G01R 27/16 (2013.01); G06F 11/0745 (2013.01); G06F 11/27 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A data processing device, comprising:
a transmitter of a high-speed data communication interface, the transmitter configured to provide data to another device via a channel, the channel being designed to have a first impedance value, but having a second impedance value that may or may not be equal to the first impedance value, the transmitter having a first output buffer configured to receive the data and having an output coupled to the channel, and a second output buffer configured to receive the data and having an output coupled to a circuit that has the first impedance;
a difference amplifier having a first input coupled to the output of the first output buffer, a second input coupled to the output of the second output buffer, and an output; and
a data detector having an input coupled to the output of the difference amplifier;
wherein the data processing device is configured, in a test operation mode, to provide test data to the first and second output buffers and to determine whether the second impedance is equal to the first impedance based on information from the data detector.