US 12,292,794 B2
Techniques for managing memory exception handling
Santhosh Kumar Siripragada, Telangana (IN)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Dec. 27, 2023, as Appl. No. 18/397,399.
Claims priority of provisional application 63/439,793, filed on Jan. 18, 2023.
Prior Publication US 2024/0241788 A1, Jul. 18, 2024
Int. Cl. G06F 11/10 (2006.01); G06F 3/06 (2006.01); G06F 11/07 (2006.01)
CPC G06F 11/1068 (2013.01) [G06F 3/0619 (2013.01); G06F 3/0656 (2013.01); G06F 3/0679 (2013.01); G06F 11/0772 (2013.01)] 20 Claims
OG exemplary drawing
 
20. A method, comprising:
writing first data associated with a first access command to a first portion of a buffer of a memory device, the first portion of the buffer allocated for the first access command;
determining a programming failure to write second data to a page of a first block of the memory device, the second data associated with a second access command;
performing an access operation associated with the first access command to vacate the first data from the first portion of the buffer in response to determining the programming failure of the second data associated with the second access command;
writing the second data associated with the second access command to the first portion of the buffer based at least in part on performing the access operation; and
writing the second data from the first portion of the buffer to a page of a second block of the memory device based at least in part on writing the second data to the first portion of the buffer.