US 12,292,662 B2
Electronic apparatus
Akihiko Saitoh, Tokyo (JP); and Tomokazu Ishikawa, Tokyo (JP)
Assigned to JAPAN DISPLAY INC., Tokyo (JP)
Filed by Japan Display Inc., Tokyo (JP)
Filed on Jul. 19, 2022, as Appl. No. 17/867,710.
Application 17/867,710 is a continuation of application No. PCT/JP2020/042186, filed on Nov. 12, 2020.
Claims priority of application No. 2020-007767 (JP), filed on Jan. 21, 2020.
Prior Publication US 2022/0357624 A1, Nov. 10, 2022
Int. Cl. G02F 1/1362 (2006.01); G02F 1/1343 (2006.01)
CPC G02F 1/136204 (2013.01) [G02F 1/134309 (2013.01); G02F 1/136227 (2013.01); G02F 1/136286 (2013.01); G02F 2201/501 (2013.01); G02F 2201/503 (2013.01); G02F 2201/56 (2013.01)] 6 Claims
OG exemplary drawing
 
1. An electronic apparatus comprising:
a substrate;
a first region in which a plurality of pixels are provided on the substrate and that has a first side, a second side, a third side, a fourth side, and a plurality of curved line parts;
a second region positioned between an end part of the substrate and the first region;
a plurality of signal lines;
an organic insulating film covering the signal lines;
a signal-line coupling circuit disposed in the second region and coupled to the signal lines;
a plurality of wires coupling the signal-line coupling circuit to a plurality of terminals arrayed in the second region;
a first shield layer that is provided above the organic insulating film near at least one of the curved line parts, covers at least part of the signal-line coupling circuit, the wires, and the signal lines, and is provided with a plurality of openings;
a second shield layer covering the openings;
a plurality of scan lines intersecting the signal lines;
at least one gate driver disposed in the second region and coupled to the scan lines; and
an ion trapping electrode provided between the first shield layer and the gate driver and between the second shield layer and the gate driver near at least one of the curved line parts and supplied with constant potential.