US 12,292,473 B2
Yield improvements for three-dimensionally stacked neural network accelerators
Andreas Georg Nowatzyk, San Jose, CA (US); and Olivier Temam, Antony (FR)
Assigned to Google LLC, Mountain View, CA (US)
Filed by Google LLC, Mountain View, CA (US)
Filed on Dec. 4, 2023, as Appl. No. 18/527,902.
Application 18/527,902 is a continuation of application No. 17/213,871, filed on Mar. 26, 2021, granted, now 11,836,598.
Application 17/213,871 is a continuation of application No. 15/685,672, filed on Aug. 24, 2017, granted, now 10,963,780, issued on Mar. 30, 2021.
Prior Publication US 2024/0220773 A1, Jul. 4, 2024
Int. Cl. G01R 31/317 (2006.01); G06N 3/045 (2023.01); H02J 50/10 (2016.01); H04L 45/02 (2022.01); H04L 45/28 (2022.01)
CPC G01R 31/31723 (2013.01) [G01R 31/31718 (2013.01); G01R 31/31722 (2013.01); G06N 3/045 (2023.01); H02J 50/10 (2016.02); H04L 45/06 (2013.01); H04L 45/28 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A device comprising a plurality of stacked dies, each die comprising a plurality of tiles, wherein each tile comprises:
a processing element configured to perform one or more computations;
an inductive coil that is reconfigurable to receive data from a vertically adjacent tile of another die in the plurality of stacked dies; and
switching circuitry that is reconfigurable to select between routing input data received through the inductive coil to the processing element or routing the input data to a processing element bypass that bypasses the processing element.