US 12,292,462 B2
Inductance measurement circuits and methods using auto-adaptive floating time voltage measurement windows
Koami Kpoto, Pertuis (FR); Andre Mourrier, Manosque (FR); Guy Clerc, La Tour de Salvagny (FR); Bruno Allard, Mions (FR); and Federico Bribiesca Argomedo, Lyons (FR)
Assigned to Infineon Technologies AG, Neubiberg (DE); Ecole Centrale de Lyon, Ecully (FR); Institute National Des Sciences Appliquees de Lyon, Villeurbanne (FR); Université Claude Bernard Lyon 1, Villeurbanne (FR); and Centre National de La Recherche Scientifque, Paris (FR)
Filed by Infineon Technologies AG, Neubiberg (DE); Ecole Centrale de Lyon, Ecully (FR); Institute National Des Sciences Appliquees de Lyon, Villeurbanne (FR); Université Claude Bernard Lyon 1, Villeurbanne (FR); and Centre National de La Recherche Scientifique, Paris (FR)
Filed on Mar. 17, 2023, as Appl. No. 18/185,787.
Prior Publication US 2024/0310421 A1, Sep. 19, 2024
Int. Cl. G01R 27/26 (2006.01); G01R 31/00 (2006.01)
CPC G01R 27/2611 (2013.01) [G01R 31/005 (2013.01)] 21 Claims
OG exemplary drawing
 
1. An inductance measurement circuit comprising:
a capacitor connected to an electrical line;
one or more circuit elements configured to charge the capacitor in time steps to a voltage level, wherein a number of the time steps to reach the voltage level defines a coarse measurement of inductance of the electrical line; and
a detection circuit configured to measure a charging rate associated with charging the capacitor within a measurement window that is defined at the voltage level, wherein the charging rate associated with charging the capacitor within the measurement window defines a fine measurement of the inductance of the electrical line, and wherein a combination of the coarse measurement and the fine measurement defines inductance of the electrical line.