CPC H10K 59/1213 (2023.02) [H10K 59/1216 (2023.02); H10K 59/122 (2023.02); H10K 59/131 (2023.02); H10K 59/351 (2023.02); H10K 59/353 (2023.02)] | 19 Claims |
1. An array substrate, comprising:
a plurality of light emitting elements respectively in a plurality of subpixels; and
a plurality of pixel driving circuits respectively in the plurality of subpixels configured to respectively drive the plurality of light emitting elements;
wherein a respective one of the pixel driving circuits comprises a third transistor;
third transistors respectively in subpixels in a same row are controlled by a same gate line, and having gate electrodes of a substantially same shape;
an orthographic projection of a third anode of a third light emitting element in a respective third subpixel on a base substrate at least partially overlaps with orthographic projections of two third transistors respectively in two adjacent subpixels on the base substrates; and
the array substrate further comprises a first anode of a first light emitting element adjacent to the third anode in a first direction, the first anode comprising a main portion, and a protrusion portion protruding along the first direction from a side of the main portion toward one side away from an adjacent third anode in the first direction.
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