CPC H04W 72/53 (2023.01) [H04L 5/0048 (2013.01); H04L 5/0082 (2013.01); H04W 72/0446 (2013.01); H04W 72/23 (2023.01)] | 10 Claims |
1. A transmission device comprising:
circuitry which, in operation, allocates data to a plurality of transmission time intervals (TTIs) respectively comprising a lower number of symbols than a slot, the plurality of TTIs including an initial TTI and one or more subsequent TTIs subsequent to the initial TTI, wherein the data allocated to each of the plurality of TTIs is the same, and
further allocates a demodulation reference signal (DMRS) to the initial TTI, and
a transceiver which, in operation, receives, from a reception device, control signaling including a DMRS allocation indicator for the one or more subsequent TTIs,
wherein,
the circuitry, in operation, obtains, based on the control signaling, a DMRS allocation for each of the subsequent TTIs including whether a DMRS is added to the respective TTI or not; and
the transceiver, in operation, transmits, within the slot, the data and the DMRS allocated to the initial TTI and the data allocated to the one or more subsequent TTIs to the reception device, wherein DMRS transmission in the one or more subsequent TTIs is based on the DMRS allocation.
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