US 11,973,087 B2
Array substrate and method of manufacturing the same, and display panel
Wenming Ren, Beijing (CN); Jinliang Hu, Beijing (CN); Jian Ma, Beijing (CN); and Chengyong Zhan, Beijing (CN)
Assigned to Hefei Xinsheng Optoelectronics Technology Co., Ltd., Anhui (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/297,655
Filed by Hefei Xinsheng Optoelectronics Technology Co., Ltd., Anhui (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Sep. 29, 2020, PCT No. PCT/CN2020/119046
§ 371(c)(1), (2) Date May 27, 2021,
PCT Pub. No. WO2022/067574, PCT Pub. Date Apr. 7, 2022.
Prior Publication US 2022/0310670 A1, Sep. 29, 2022
Int. Cl. H01L 27/12 (2006.01); G02F 1/1368 (2006.01)
CPC H01L 27/1248 (2013.01) [G02F 1/1368 (2013.01); H01L 27/1296 (2013.01)] 24 Claims
OG exemplary drawing
 
7. An array substrate, comprising:
a base substrate;
a drive circuit layer, disposed on one side of the base substrate and comprising a switching transistor;
an insulating material layer, disposed on one side of the drive circuit layer distal to the base substrate, and having a connection via-hole exposing at least a part region of a drain electrode of the switching transistor; and
an electrode layer, disposed on one side of the insulating material layer distal to the base substrate, wherein a surface of the electrode layer distal to the base substrate has at least one groove structure extending to the connection via-hole;
wherein the electrode layer comprises a first electrode layer, an insulating dielectric layer and a second electrode layer sequentially laminated on one side of the insulating material layer distal to the base substrate;
wherein the second electrode layer comprises a plurality of strip sub-electrodes and slits located among the strip sub-electrodes, wherein any one of the groove structures is in communication with one of the slits; and
wherein a width of the groove structure is the same as a width of the communicated slit.