US 11,973,028 B2
Redistribution substrate, method of fabricating the same, and semiconductor package including the same
Jongyoun Kim, Seoul (KR); Seokhyun Lee, Hwaseong-si (KR); and Minjun Bae, Yongin-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Feb. 6, 2023, as Appl. No. 18/105,945.
Application 18/105,945 is a continuation of application No. 17/189,964, filed on Mar. 2, 2021, granted, now 11,600,564.
Application 17/189,964 is a continuation of application No. 16/351,709, filed on Mar. 13, 2019, granted, now 10,950,539, issued on Mar. 16, 2021.
Claims priority of application No. 10-2018-0109695 (KR), filed on Sep. 13, 2018.
Prior Publication US 2023/0187345 A1, Jun. 15, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 23/31 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 21/565 (2013.01); H01L 21/76819 (2013.01); H01L 21/76871 (2013.01); H01L 21/76877 (2013.01); H01L 23/3128 (2013.01); H01L 23/5283 (2013.01); H01L 24/09 (2013.01); H01L 24/17 (2013.01); H01L 2224/0231 (2013.01); H01L 2224/02373 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/0401 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A redistribution substrate comprising:
a first conductive pattern;
a first seed layer on a bottom surface of the first conductive pattern;
a first via connected to a top surface of the first conductive pattern, the top surface of the first conductive pattern and a lateral surface of the first via are substantially perpendicular;
a second seed layer between the first via and the first conductive pattern;
a first dielectric layer that encapsulates the first conductive pattern and the first via, a top surface of the first dielectric layer being coplanar with a top surface of the first via;
a second conductive pattern on the top surface of the first via;
a third seed layer on a bottom surface of the second conductive pattern;
a second via connected to a top surface of the second conductive pattern, the top surface of the second conductive pattern and a lateral surface of the second via are substantially perpendicular;
a fourth seed layer between the second via and the second conductive pattern; and
a second dielectric layer that encapsulates the second conductive pattern and the second via on the first dielectric layer.