US 11,972,821 B2
Shift register unit and control method thereof, gate driving circuit, and display device
Zhidong Yuan, Beijing (CN); Yongqian Li, Beijing (CN); and Can Yuan, Beijing (CN)
Assigned to Hefei BOE Joint Technology Co., Ltd., Anhui (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 17/766,828
Filed by Hefei BOE Joint Technology Co., Ltd., Anhui (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Apr. 15, 2021, PCT No. PCT/CN2021/087472
§ 371(c)(1), (2) Date Apr. 6, 2022,
PCT Pub. No. WO2021/227766, PCT Pub. Date Nov. 18, 2021.
Claims priority of application No. 202010385861.1 (CN), filed on May 9, 2020.
Prior Publication US 2024/0087661 A1, Mar. 14, 2024
Int. Cl. G11C 19/28 (2006.01); G09G 3/32 (2016.01)
CPC G11C 19/28 (2013.01) [G09G 3/32 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A shift register unit, comprising a first control circuit, a pull-down control circuit, a second control circuit, a first pull-down circuit, an energy storage circuit, and an output circuit, wherein
the first control circuit is configured for writing a first clock signal provided by a first clock signal end into a first node under control of potential of a cascade output end;
the pull-down control circuit is configured for writing an electrical signal of a second node into a control end of the first pull-down circuit under control of a second clock signal provided by a second clock signal end;
the second control circuit is configured for writing a third clock signal provided by a third clock signal end into the control end of the first pull-down circuit under control of an input signal provided by an input signal end;
the first pull-down circuit is configured for pulling down potential of the first node under control of potential of the control end of the first pull-down circuit;
the energy storage circuit is configured for controlling the potential of the first node;
the output circuit is configured to output a first voltage signal provided by a first voltage end to a signal output end under the control of the potential of the first node.