US 11,972,795 B2
Verification of a weight stored in a non-volatile memory cell in a neural network following a programming operation
Farnood Merrikh Bayat, Goleta, CA (US); Xinjie Guo, Goleta, CA (US); Dmitri Strukov, Goleta, CA (US); Nhan Do, Saratoga, CA (US); Hieu Van Tran, San Jose, CA (US); Vipin Tiwari, Dublin, CA (US); and Mark Reiten, Alamo, CA (US)
Assigned to SILICON STORAGE TECHNOLOGY, INC., San Jose, CA (US)
Filed by Silicon Storage Technology, Inc., San Jose, CA (US); and The Regents of the University of California, Oakland, CA (US)
Filed on Mar. 10, 2023, as Appl. No. 18/120,360.
Application 18/120,360 is a division of application No. 17/233,006, filed on Apr. 16, 2021, granted, now 11,829,859.
Application 17/233,006 is a continuation of application No. 15/594,439, filed on May 12, 2017, granted, now 11,308,383, issued on Apr. 19, 2022.
Claims priority of provisional application 62/337,760, filed on May 17, 2016.
Prior Publication US 2023/0206026 A1, Jun. 29, 2023
Int. Cl. G11C 11/54 (2006.01); G06F 3/06 (2006.01); G06N 3/04 (2023.01); G06N 3/045 (2023.01); G06N 3/063 (2023.01); G11C 16/08 (2006.01); G11C 16/12 (2006.01); G11C 16/16 (2006.01); G11C 16/34 (2006.01); G11C 29/38 (2006.01)
CPC G11C 11/54 (2013.01) [G06F 3/061 (2013.01); G06F 3/0655 (2013.01); G06F 3/0688 (2013.01); G06N 3/04 (2013.01); G06N 3/045 (2023.01); G06N 3/063 (2013.01); G11C 16/08 (2013.01); G11C 16/12 (2013.01); G11C 16/16 (2013.01); G11C 16/3436 (2013.01); G11C 29/38 (2013.01)] 5 Claims
OG exemplary drawing
 
1. A circuit comprising:
a digital-to-analog converter to convert a target weight comprising digital bits into a target voltage;
a current-to-voltage converter to convert an output current from a selected non-volatile memory cell during a verify operation into an output voltage; and
a comparator to compare the output voltage to the target voltage during a verify operation.