| CPC H10N 52/101 (2023.02) [G01R 33/072 (2013.01); H10N 50/80 (2023.02)] | 35 Claims |

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1. An integrated semiconductor substrate comprising:
a top layer or an upper surface;
an integrated magnetic flux concentrator comprising at least one layer comprising a soft magnetic material;
wherein the integrated magnetic flux concentrator extends at least partially inside said top layer and/or below said upper surface;
wherein the integrated semiconductor substrate further comprises an interconnection stack comprising at least three or at least four metal layers; and
wherein the integrated magnetic flux concentrator extends at least partially into the interconnection stack.
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