| CPC H10D 64/517 (2025.01) [H10D 30/60 (2025.01); H10D 84/0135 (2025.01); H10D 84/038 (2025.01)] | 7 Claims |
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1. A semiconductor structure, comprising:
a substrate;
a transistor disposed on the substrate, wherein the transistor comprises a gate structure, a source and a drain, and the gate structure of the transistor located on the substrate and extending along a first direction; and
a plurality of supporting patterns located in the gate structure of the transistor, wherein the plurality of supporting patterns are separated from each other and arranged along a second direction, wherein the second direction is perpendicular to the first direction, and wherein at least four supporting patterns of the plurality of supporting patterns constitute a supporting pattern dashed line, wherein the supporting pattern dashed line extends along the second direction;
a plane consisting of the first direction and the second direction, and the plurality of supporting patterns are arranged on the plane consisting of the first direction and the second direction, wherein the plane consisting of the first direction and the second direction is parallel to a top surface of the substrate.
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