| CPC H10D 30/6756 (2025.01) [G09G 3/3225 (2013.01); G09G 3/3266 (2013.01); H10D 30/6757 (2025.01); H10D 62/402 (2025.01); H10D 62/80 (2025.01); H10D 86/423 (2025.01); H10D 86/60 (2025.01); H10D 99/00 (2025.01); G09G 2300/0809 (2013.01); H01L 21/465 (2013.01); H10D 30/6723 (2025.01); H10D 30/673 (2025.01); H10K 59/12 (2023.02)] | 20 Claims |

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1. A method of manufacturing a thin film transistor comprising:
forming a gate electrode;
forming a semiconductor layer overlapping the gate electrode, the semiconductor layer including a first semiconductor layer of an iron oxide semiconductor and a second semiconductor layer of non-iron oxide semiconductor; and
forming a source electrode and a drain electrode, each being spaced from the semiconductor layer and contacting the semiconductor layer,
wherein a band-gap energy of the second semiconductor layer is greater than a band-gap energy of the first semiconductor layer.
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