US 12,289,902 B2
Nitride-based semiconductor device and method for manufacturing the same
Yi-Lun Chou, Suzhou (CN); Shuang Gao, Suzhou (CN); and Chuangang Li, Suzhou (CN)
Assigned to INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD., Suzhou (CN)
Appl. No. 17/623,259
Filed by INNOSCIENCE (SUZHOU) TECHNOLOGY CO., LTD., Suzhou (CN)
PCT Filed Nov. 9, 2021, PCT No. PCT/CN2021/129628
§ 371(c)(1), (2) Date Dec. 28, 2021,
PCT Pub. No. WO2023/082060, PCT Pub. Date May 19, 2023.
Prior Publication US 2024/0038885 A1, Feb. 1, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H10D 30/47 (2025.01); H01L 21/02 (2006.01); H01L 21/306 (2006.01); H01L 21/76 (2006.01); H10D 30/01 (2025.01); H10D 62/10 (2025.01); H10D 62/824 (2025.01); H10D 62/85 (2025.01)
CPC H10D 30/475 (2025.01) [H01L 21/02241 (2013.01); H01L 21/0254 (2013.01); H01L 21/30612 (2013.01); H01L 21/7605 (2013.01); H10D 30/015 (2025.01); H10D 30/4755 (2025.01); H10D 30/477 (2025.01); H10D 62/113 (2025.01); H10D 62/824 (2025.01); H10D 62/8503 (2025.01)] 15 Claims
OG exemplary drawing
 
1. A nitride-based semiconductor device, comprising:
a first nitride-based semiconductor layer doped to a first conductivity type;
a second nitride-based semiconductor layer disposed over the first nitride-based semiconductor layer;
a single III-V group semiconductor layer disposed between the first and second nitride-based semiconductor layers and doped to the first conductivity type, wherein the single III-V group semiconductor layer has a high resistivity region and a current aperture enclosed by the high resistivity region, wherein the high resistivity region comprises more metal oxides than the current aperture so as to achieve a resistivity higher than that of the current aperture;
a third nitride-based semiconductor layer disposed over the second nitride-based semiconductor layer;
a first source electrode and a second source electrode disposed over the third nitride-based semiconductor layer; and
a gate electrode disposed over the third nitride-based semiconductor layer and between the first source electrode and the second source electrode, wherein the gate electrode aligns with the current aperture.