| CPC H10D 30/015 (2025.01) [H10D 30/475 (2025.01); H10D 30/477 (2025.01); H10D 62/8503 (2025.01); H10D 64/513 (2025.01)] | 20 Claims |

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1. A nitride-based semiconductor device, comprising:
a first nitride-based semiconductor layer comprising at least two doped barrier regions defining an aperture between the doped barrier regions;
a second nitride-based semiconductor layer disposed over first nitride-based semiconductor layer;
a third nitride-based semiconductor layer disposed on the second nitride-based semiconductor layer and having a bandgap higher than a bandgap of the second nitride-based semiconductor layer;
a passivation layer disposed over the third nitride-based semiconductor layer, wherein a vertical projection of the passivation layer on the first nitride-based semiconductor layer is spaced apart from the aperture;
a gate insulator layer disposed over the third nitride-based semiconductor layer; and
a gate electrode disposed over the gate insulator layer and aligning with the aperture;
wherein the gate electrode and the aperture are vertically separated by the second nitride-based semiconductor layer, the third nitride-based semiconductor layer and the gate insulator layer;
wherein the passivation layer is in physical contact with the third nitride-based semiconductor layer, and the passivation layer and the at least two doped barrier regions are vertically separated by the second nitride-based semiconductor layer and the third nitride-based semiconductor layer;
wherein the aperture has a conductivity higher than a conductivity of the at least two doped barrier regions.
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