| CPC H04W 72/569 (2023.01) [H04W 72/543 (2023.01)] | 20 Claims |

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1. A device, comprising:
at least one antenna; and
a plurality of buffer sets, wherein each buffer set comprises a plurality of queue buffers, and each queue buffer is dedicated for a respective application category;
a circuit, communicating with one or more stations through the at least one antenna, wherein the circuit is configured to classify a plurality of incoming frames or packets according to delay time requirements of applications corresponding to the plurality of incoming frames or packets, wherein the delay time requirements respectively indicate that delay time of the plurality of incoming frames or packets have to be lower than certain values;
wherein in response to the circuit determining that the plurality of incoming frames or packets are classified into the same application category, the circuit performs an intra-Access Category (intra-AC) scheduling mechanism to determine priorities of data stored in the queue buffers for the same application category according to the delay time requirements of applications and QoS (quality-of-service) requirements of each station so as to arrange for a PPDU (physical-layer protocol data unit) to be transmitted to at least a portion of the stations.
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