US 12,289,556 B2
Pixel array readout circuitry
Nicholas Paul Cowley, Wroughton (GB); and Senthil Velan, Chennai (IN)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed on Apr. 13, 2023, as Appl. No. 18/300,027.
Prior Publication US 2024/0348949 A1, Oct. 17, 2024
Int. Cl. H04N 25/78 (2023.01); H04N 25/703 (2023.01)
CPC H04N 25/78 (2023.01) [H04N 25/703 (2023.01)] 20 Claims
OG exemplary drawing
 
1. An image sensor comprising:
an image sensor pixel array including a plurality of columns of image sensor pixels; and
per-column readout circuitry coupled to a given column of the plurality of columns of image sensor pixels via a column line, wherein the per-column readout circuitry is configured to:
maintain an average reset level value based on multiple reset level values, and
perform a correlated double sampling operation on an image level value using the average reset level value.