US 12,289,388 B2
Syntonization through physical layer of interconnects
Dotan David Levi, Kiryat Motzkin (IL); Wojciech Wasko, Mlynek (PL); and Natan Manevich, Ramat Hasharon (IL)
Assigned to Mellanox Technologies, Ltd, Yokneam (IL)
Filed by MELLANOX TECHNOLOGIES, LTD., Yokneam (IL)
Filed on Jul. 20, 2022, as Appl. No. 17/868,841.
Prior Publication US 2024/0031124 A1, Jan. 25, 2024
Int. Cl. H04L 7/027 (2006.01); H04L 12/40 (2006.01)
CPC H04L 7/027 (2013.01) [H04L 12/40 (2013.01)] 28 Claims
OG exemplary drawing
 
1. A clock syntonization system, comprising:
a first compute node comprising a first physical hardware clock to operate at a first clock frequency;
a second compute node; and
an interconnect data bus to transfer data from the first compute node at a data rate indicative of the first clock frequency of the first physical hardware clock, and wherein the second compute node includes clock synchronization circuitry to:
derive a second clock frequency from the data rate of the transferred data; and
provide a clock signal at the derived second clock frequency.