US 12,288,764 B2
Semiconductor device and manufacturing method thereof
Gyu Wan Han, Seoul (KR); Jin Seong Kim, Goyang-si (KR); and Byong Woo Cho, Seoul (KR)
Assigned to AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD., Singapore (SG)
Filed by Amkor Technology Singapore Holding Pte. Ltd., Singapore (SG)
Filed on Mar. 5, 2021, as Appl. No. 17/193,478.
Application 17/193,478 is a continuation of application No. 15/078,474, filed on Mar. 23, 2016, granted, now 11,049,828.
Claims priority of application No. 10-2015-0040717 (KR), filed on Mar. 24, 2015.
Prior Publication US 2021/0288010 A1, Sep. 16, 2021
Int. Cl. H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01)
CPC H01L 24/13 (2013.01) [H01L 21/56 (2013.01); H01L 23/3121 (2013.01); H01L 23/3157 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/11 (2013.01); H01L 24/17 (2013.01); H01L 24/16 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/0239 (2013.01); H01L 2224/03452 (2013.01); H01L 2224/03462 (2013.01); H01L 2224/03464 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05008 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05139 (2013.01); H01L 2224/05144 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05155 (2013.01); H01L 2224/0516 (2013.01); H01L 2224/05164 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05171 (2013.01); H01L 2224/05569 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05639 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05664 (2013.01); H01L 2224/11849 (2013.01); H01L 2224/13006 (2013.01); H01L 2224/13021 (2013.01); H01L 2224/13023 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13113 (2013.01); H01L 2224/13116 (2013.01); H01L 2224/13118 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13155 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16237 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/15321 (2013.01); H01L 2924/18161 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An electronic device, comprising:
an electronic component comprising a component top side, a component bottom side, and a first conductive pad on the component top side, wherein the electronic component comprises a first semiconductor die comprising a first semiconductor die top side and a first semiconductor die bottom side, and wherein the first conductive pad is on the first semiconductor die top side;
a second semiconductor die comprising a second semiconductor die top side, a second semiconductor die bottom side, and a second semiconductor die lateral side between the second semiconductor die top side and the second semiconductor die bottom side, wherein the second semiconductor die bottom side is coupled to the component top side;
an encapsulating layer comprising an encapsulating layer top side, an encapsulating layer bottom side on the component top side, and a first aperture that extends from the encapsulating layer top side to the encapsulating layer bottom side, wherein the encapsulating layer encapsulates and contacts at least a portion of the second semiconductor die lateral side;
a first conductive interconnection structure comprising a lower end that is on and coupled to the first conductive pad, wherein the first conductive interconnection structure passes through the first aperture, and wherein an upper end of the first conductive interconnection structure protrudes beyond the encapsulating layer top side and the second semiconductor die top side; and
a gap between the first conductive interconnection structure and an inner wall of the first aperture; and
wherein a volume of the first aperture and a volume of the first conductive interconnection structure differ by less than 20%.