US 12,288,719 B2
Semiconductor device manufacturing process including forming a bonded assembly and substrate recycling
Takuya Maehara, Yokkaichi (JP)
Assigned to Sandisk Technologies, Inc., Milpitas, CA (US)
Filed by SANDISK TECHNOLOGIES LLC, Addison, TX (US)
Filed on Apr. 13, 2022, as Appl. No. 17/659,057.
Prior Publication US 2023/0335441 A1, Oct. 19, 2023
Int. Cl. H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01)
CPC H01L 21/7813 (2013.01) [H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01)] 9 Claims
OG exemplary drawing
 
9. A method of forming a semiconductor structure, comprising:
forming an etch stop material layer and a planar sacrificial spacer layer over a front surface of a first substrate;
forming a first insulating encapsulation layer over the planar sacrificial spacer layer and on a backside surface and a side surface of the first substrate;
forming a continuous structure including first semiconductor devices over a top surface of the first insulating encapsulation layer;
etching inter-die trenches within the continuous structure to divide the continuous structure;
bonding the divided continuous structure to second semiconductor devices located over a second substrate;
removing the planar sacrificial spacer layer selective to the etch stop material layer and the first insulating encapsulation layer by performing a wet etch process in which an isotropic etchant is introduced into the inter-die trenches; and
detaching the first substrate from an assembly of the second substrate, the second semiconductor devices, and the divided continuous structure after the removing the planar sacrificial spacer layer;
wherein:
the etch stop material layer is formed by an anisotropic deposition process that deposits an etch stop material on the front surface of the first substrate and does not deposit the etch stop material on a backside surface of the first substrate;
the first insulating encapsulation layer is formed as a single continuous material layer that encapsulates the first substrate, the etch stop material layer, and the planar sacrificial spacer layer;
each of the first substrate and the planar sacrificial spacer layer comprises silicon; and
the insulating encapsulation layer is formed by oxidation of surface portions of the first substrate and the planar sacrificial spacer layer such that a thickness of the insulating encapsulation layer is greater than one half of a thickness of the etch stop material layer.