US 12,288,587 B2
High dynamic range track and hold amplifier output stage using low voltage devices
Gary M. Madison, Waltham, MA (US); and Kevin Grout, Manchester, NH (US)
Assigned to BAE Systems Information and Electronic Systems Integration Inc., Nashua, NH (US)
Filed by BAE Systems Information and Electronic Systems Integration Inc., Nashua, NH (US)
Filed on Sep. 28, 2023, as Appl. No. 18/477,058.
Prior Publication US 2025/0111881 A1, Apr. 3, 2025
Int. Cl. G11C 27/02 (2006.01); H03K 17/60 (2006.01); H03K 17/687 (2006.01); H03K 19/0175 (2006.01)
CPC G11C 27/026 (2013.01) [H03K 17/60 (2013.01); H03K 17/687 (2013.01); H03K 19/017509 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A sample and hold amplifier buffer comprising:
a positive input;
a negative input;
an output;
at least one level shifter;
at least one negative-positive-negative (NPN) bipolar junction transistor (BJT);
at least one load device; and
at least one metal oxide semiconductor field transistor (MOSFET) between a base and an emitter of the NPN BJT.