US 12,288,522 B1
Displays having reduced pixel density region with localized tuning
Shyuan Yang, San Jose, CA (US); Salman Kabir, Santa Clara, CA (US); Ricardo A Peterson, Fremont, CA (US); Warren S Rieutort-Louis, Cupertino, CA (US); Ting-Kuo Chang, San Jose, CA (US); Qing Li, Cupertino, CA (US); Yuchi Che, Santa Clara, CA (US); Tsung-Ting Tsai, San Jose, CA (US); Feng Wen, Cupertino, CA (US); Abbas Jamshidi Roudbari, Saratoga, CA (US); Kyounghwan Kim, San Jose, CA (US); Graeme M Williams, San Diego, CA (US); Kingsuk Brahma, Mountain View, CA (US); Yue Jack Chu, Palo Alto, CA (US); Junbo Wu, Palo Alto, CA (US); Chieh-Wei Chen, Taichung (TW); Bo-Ren Wang, San Diego, CA (US); Injae Hwang, Santa Clara, CA (US); and Wenbing Hu, Campbell, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Jul. 11, 2023, as Appl. No. 18/350,621.
Claims priority of provisional application 63/409,608, filed on Sep. 23, 2022.
Int. Cl. G09G 3/3258 (2016.01)
CPC G09G 3/3258 (2013.01) [G09G 2300/0452 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0291 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0247 (2013.01); G09G 2320/041 (2013.01); G09G 2320/043 (2013.01); G09G 2330/028 (2013.01)] 25 Claims
OG exemplary drawing
 
1. An electronic device comprising:
a sensor; and
a display having at least a first pixel formed in a reduced pixel density region overlapping with the sensor and having at least a second pixel formed in a full pixel density region at least partially surrounding the reduced pixel density region, wherein
the reduced pixel density region has a first pixel density,
the full pixel density region has a second pixel density greater than the first pixel density,
the first pixel formed in the reduced pixel density region is configured to receive a first positive power supply voltage,
the second pixel formed in the full pixel density region is configured to receive a second positive power supply voltage different than the first positive power supply voltage, and
the display further comprises:
a power supply grid configured to convey the second positive power supply voltage to a plurality of pixels, including the second pixel, in the full pixel density region; and
a conductive path routed along a periphery the display or through the full pixel density region and configured to convey the first positive power supply voltage to a plurality of pixels, including the first pixel, in the reduced pixel density region.